Using SPI interface to free FPGA routing resources is allowing over 90% utilization, fast timing closure and supports modular design approach without consequences. When doing designs with FPGA you are ...
This application note describes a method for configuring a Spartan®-7 FPGA from a 1.8V serial peripheral interface (SPI) NOR flash memory connected to the FPGA dedicated I/O bank 0 at 1.8V and ...
The folks at Lattice Semiconductor have just announced a LatticeECP2 and LatticeECP2M (“LatticeECP2/M”) FPGA interface reference design supporting the Texas Instruments' ADS6000 family of ...
If you've grown tired of purchasing premium FPGAs to gain the benefit of a full-rate SPI-4.2 bridge core supporting complex packet flow and traffic management, consider the Economy Plus 2 (ECP2) ...
LatticeECP2/M FPGA Interface to Texas Instruments’ADS6000 ADC Family Delivers Exceptional Performance and Value HILLSBORO, OR - JANUARY 14, 2008 - Lattice Semiconductor Corporation (NASDAQ: LSCC) ...